1. Field
Exemplary embodiments of the present invention relate to a semiconductor test circuit for measuring a resistance of a Through-Silicon-Via (TSV), and a semiconductor device including the semiconductor test circuit.
2. Description of the Related Art
Packaging technology for a semiconductor integrated circuit has made progress continuously to satisfy the demands for minimization and reliability of the semiconductor integrated circuit. As recent products are required to realize high performance as well as small size, diverse stack packaging methods are being developed. Among them is a three-dimensional (3D) semiconductor device whose integration degree is raised by stacking a plurality of chips in a single package to achieve high integration of the device.
Stacking technology, which means piling up of at least two chips or packages vertically, may realize more than twice as much memory capacity as that of a 2D device, such as a 2D semiconductor memory device. Besides the increased memory capacity, the stack package is also advantageous in terms of mount density and the efficiency of mount space. For these reasons, the industry is accelerating research and development on the stack package.
The individual semiconductor chips of a stack package are electrically connected to each other through metal wire or Through-Silicon-Via (TSV). The TSV of the stack package is formed inside the semiconductor chips, and the stacked semiconductor chips are electrically connected to each other through the TSV. The stack package using the TSV capable of interfacing signals and power may have excellent operation performance due to improved bandwidth while minimizing current consumption and signal delay.
Because reliable connection between the stacked chips through the TSV is important, the resistance of the TSV after packaging is measured to check the connection of the TSV. For measurement of the resistance of TSV, a first die of the stacked chips is connected to a particular test pad, and a second die of the stacked chips is provided with a test driver. The test driver supplies power to the TSV and the current flowing through the TSV is monitored at the test pad. Such measurement, however, hardly measures the resistance of the TSV because of noise including resistance due to the distance to the test pad and a transistor involved in the measurement. Since the resistance of the transistor involved in the measurement is relatively greater than the resistance of the TSV, measurement error becomes significant. After all, since errors occur from the PVT (Process, Voltage, and Temperature) of the transistor involved in the measurement, it is difficult to accurately measure the resistance of the TSV.